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PDF Solutions and Virage Logic Partner to Create Process-Aware Semiconductor IP Libraries
Creation of pDfx-Compliant Libraries
Helps Designers Create Better Yielding ICs
SAN JOSE, Calif.—(BUSINESS WIRE)—Oct. 6, 2004—
PDF Solutions(R), Inc. (Nasdaq:PDFS), the leading provider of
semiconductor process-design integration technologies and services,
and Virage Logic Corp. (Nasdaq:VIRL), a leading provider of
semiconductor IP platforms, announced that the companies are
partnering to develop process-aware extensions to Virage Logic's Area,
Speed and Power (ASAP) Logic(TM) standard cell IP libraries. Through
this collaboration, the Virage Logic libraries will be extended with
DFM variants that incorporate PDF Solutions' learning from more than
25 yield ramps and yield simulation technology. The extended ASAP
Logic libraries will be compliant with PDF Solutions' revolutionary
pDfx process-aware design for manufacturability (DFM) environment,
which integrates seamlessly with industry leading design flows to help
designers create integrated circuit (IC) designs that are more
manufacturable.
"Virage Logic is committed to helping its customers with their
yield and manufacturability challenges and has a proven track record
of providing memory yield improvements of up to 250% to its STAR
Memory System customers," said Adam Kablanian, president and CEO,
Virage Logic. "With access to PDF Solutions' pDfx, we will be able to
offer advanced DFM capabilities throughout our semiconductor IP
platform product portfolio, extending our ability to deliver on our
commitment to providing customers with the IP necessary to
successfully manage nanometer technology challenges."
"It will take cooperation between companies throughout the design
and manufacturing chain to provide designers the tools they need to
solve the increasing challenges associated with semiconductor yield,"
said John Kibarian, president and CEO, PDF Solutions. "We are very
pleased to work with Virage Logic to add this important part of the
pDfx infrastructure, which is designed to help Virage Logic's
customers increase their profitability by creating better yielding
designs. This alliance continues the industry's adoption of pDfx
technology."
About the pDfx Process-Aware Design Environment
The pDfx environment packages PDF Solutions' extensive knowledge
of leading-edge IC manufacturability and delivers it directly to IC
designers through the leading commercial synthesis and place and route
EDA packages. Using pDfx, designers can optimize products for
manufacturability before tapeout, which is designed to result in
product cost savings and faster ramps to production-level yields. This
reduces the need to re-spin mask sets for manufacturability issues,
which is essential to designers as IC designs move to 130 nanometer
and smaller technologies. pDfx is designed to integrate with
proprietary and commercial intellectual property for the target
process. pDfx is integrated in Magma's Blast Fusion and interoperable
with Physical Compiler from Synopsys and First Encounter Global
Physical Synthesis from Cadence. Initial design efforts using the pDfx
environment have resulted in customers achieving yield improvements
ranging from five- to ten-percent increases in net good die. This
level of yield improvement gives customers of pDfx a major competitive
advantage.
About Virage Logic's ASAP Logic and STAR Memory System
The ASAP Logic product line, based on Virage Logic's proprietary
and patented routing methodology and cell architecture, contains
application-optimized libraries targeted to unique market
requirements. The ASAP Logic Standard Cell Libraries are optimized for
area, speed, and power and provide up to a 30 percent increase in
utilization when compared to conventional standard cell libraries.
The STAR Memory System provides the most integrated solution for
the cost effective embedding, on-chip testing and repairing of
multi-megabit memories. The system includes High-Speed, High-Density
or Ultra-Low-Power memories to address a broad range of SoC design
requirements. The system consists of one or more STAR and/or ASAP SRAM
or ROM Memory blocks, a STAR Processor, a STAR JPC that provides a
chip-level infrastructure hub to connect multiple STAR Memory System
instances, a STAR Fuse Box and a STAR Builder to automate the
insertion of the STAR Memory System into the functional hierarchy of
the design. With customers experiencing yield improvements of up to
250%, the STAR Memory System can potentially save millions of dollars
in recovered silicon, substantially reduce test costs, and achieve
shorter time-to-volume.
About PDF Solutions
PDF Solutions, Inc. (Nasdaq:PDFS) is the leading provider of
process-design integration technologies to enhance IC
manufacturability. PDF Solutions' software, methodologies, and
services enable semiconductor companies to create IC designs that are
more manufacturable, and manufacturing processes that are more
capable. By simulating nanometer-scale product and process
interactions, PDF Solutions offers customers faster time-to-market,
increased IC yield and performance, and improved product reliability
and profitability. Headquartered in San Jose, Calif., PDF Solutions
operates worldwide. For more information, visit www.pdf.com.
About Virage Logic Corporation
Founded in 1996, Virage Logic Corporation quickly established
itself as a technology and market leader in providing advanced
embedded memory intellectual property (IP) for the design of complex
integrated circuits. Virage Logic has evolved to become a global
leader in semiconductor IP platforms comprising embedded memory,
standard cells, and I/Os primarily for the consumer, communications
and networking, handheld and portable, and computer and graphics
markets. Virage Logic's highly differentiated product portfolio
provides foundries, integrated device manufacturers (IDMs), and
fabless customers with key competitive advantages including higher
performance, lower power, higher density and optimal yield. The
company's comprehensive quality efforts are validated in its
FirstPass-Silicon Characterization lab, which ensures high quality,
reliable IP across a wide range of foundries and process technologies.
Headquartered in Fremont, California, Virage Logic has R&D, sales and
support offices worldwide. For more information, visit
www.viragelogic.com.
PDF Solutions is a registered trademark and pDfx is a trademark of
PDF Solutions, Inc. Other trademarks used herein are the property of
their respective owners.
Safe Harbor Statement for Virage Logic under the Private
Securities Litigation Reform Act of 1995:
Statements made in this news release, other than statements of
historical fact, are forward-looking statements, including, for
example, statements relating to trends, business outlook, products,
and customer relationships. Forward-looking statements are subject to
a number of known and unknown risks and uncertainties, which might
cause actual results to differ materially from those expressed or
implied by such statements. These risks and uncertainties include
Virage Logic's ability to forecast its business, including its
revenue, income and order flow outlook; Virage Logic's ability to
execute on its strategy to become a provider of semiconductor IP
platforms; Virage Logic's ability to continue to develop new products
and maintain and develop new relationships with third-party foundries
and integrated device manufacturers; adoption of Virage Logic's
technologies by semiconductor companies and increases or fluctuations
in the demand for their products; the company's ability to overcome
the challenges associated with establishing licensing relationships
with semiconductor companies; the company's ability to obtain royalty
revenues from customers in addition to license fees, to receive
accurate information necessary for calculating royalty revenues and to
collect royalty revenues from customers; business and economic
conditions generally and in the semiconductor industry in particular;
competition in the market for semiconductor IP platforms; and other
risks including those described in the company's Annual Report on Form
10-K for the period ended September 30, 2003, and in Virage Logic's
other periodic reports filed with the SEC, all of which are available
from Virage Logic's website (www.viragelogic.com) or from the SEC's
website (www.sec.gov), and in news releases and other communications.
Virage Logic disclaims any intention or duty to update any
forward-looking statements made in this news release.
All trademarks and copyrights are property of their respective
owners and are protected therein.
Contact:
PDF Solutions, Inc.
Sonia Segovia, 408-938-6491 (IR)
sonia.segovia@pdf.com
or
Armstrong Kendall, Inc. (for PDF Solutions, Inc.)
Jen Bernier, 408-997-7762 (PR)
jen@akipr.com
or
Virage Logic Corp.
Sabina Burns, 510-743-8115
sabina.burns@viragelogic.com
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